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SOC RTL Design Engineer- Santa Clara, CA /Austin, TX / Full-Time Job opportunity

Company: Mirafra Inc
Location: Austin
Posted on: August 1, 2020

Job Description:

Role SOC RTL Design Engineer Location Santa Clara, CA Austin, TX Duration Full-time Job Description As a SOC RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architectureproduct definition through early involvement in the product life-cycle. Minimum qualifications BABS degree in Electrical Engineering with 5 years of practical experience Strong fundamentals in digital ASIC design experience using Verilog or VHDL Experience with ASIC designmicro-architecture, synthesis, timingpower analysis Preferred qualifications MS degree in Electrical Engineering 10 years of practical experience Knowledge of SOC architecture Familiarity with high performance and low power design techniques Some hands-on experience in design verification andor physical design Knowledge of FPGA and emulation platforms Knowledge of assertion-based formal verification Domain knowledge in one or more of these areas fabric, memory controller, security, caches, coherence, MMU, high speed interfacesprotocols Roles and Responsibilities Work with chip architect to understand architecture concept and high level requirements Conceive of the micro-architecture and write design specifications Convert design spec to Verilog RTL Provide assertions for the design to ensure RTL is of the highest quality Support the verification team to devise appropriate test plans and verification strategy Collaborate with physical design team to close timing, area targets, reliability, etc. Collaborate with power team on power analysis and closure Assist in emulation, FPGA, prototyping efforts Assist in silicon bring-up, debug and characterization Thanks and Regards, Manas Phone 346-706-3834

Keywords: Mirafra Inc, Austin , SOC RTL Design Engineer- Santa Clara, CA /Austin, TX / Full-Time Job opportunity, Other , Austin, Texas

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