Applications Engineer - DC\/PT
Posted on: January 14, 2019
Applications Engineer - DC/PT
Job Description and Requirements
The primary focus of the Design Methodology Specialist (DMS) Application Engineer (AE) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects. DMS AEs are expected to possess Formal Verification, Verilog RTL coding, Synthesis (logical and physical) experience and knowledge. Experience with STA (including SI), low power optimization/multi-voltage design implementation and multi-voltage static verification is preferred. In addition, DMS AEs are expected to be able to articulate design methodologies involving Synopsys tools and be 'elevator-talk' proficient in the full Synopsys tool portfolio. Development time will be spent gaining expertise in additional, or specialization tools, broadening focus from product emphasis to methodology, sharpening Account Management skills, and learning to leverage success. DMS AEs support Account Managers to exceed quota; they also provide technical support to ensure customer success and satisfaction. DMS ACs are expected to manage multiple customer activities concurrently, and work with Account Managers and AE management to set their priorities. Sales support roles include product demonstrations, evaluations, and competitive benchmarking. Customer support roles include training, problem resolution, and technical account management. DMS AEs must be able to interact effectively with end-users at customer sites, as well as first level managers. DMS AEs also participate in account planning, where they work as part of the account team to develop the Synopsys solution to customer problems by bringing their understanding of customers' needs and issues. DMS AEs leverage their knowledge by writing Solv Net! Articles, and by assisting other AEs. Some travel may be required.
Design experience should include ASIC design using industry-standard hardware description languages (Verilog). Excellent verbal and written presentation/communication skills are mandatory. Strong interest and understanding of design methodologies is required. Deep Synopsys front end tool (Logical and Physical Synthesis, Formal Verification, Verilog RTL coding, Low power/Multi-voltage flows, Static Timing Analysis, including noise analysis) experience and knowledge are required. Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position. BSEE or equivalent, required with 8 years of experience, or MSEE, or equivalent with 7 years of experience.
USA - California - Mountain View/Sunnyvale, USA - Massachusetts - Marlboro, USA - Texas - Austin
Keywords: Synopsys, Austin , Applications Engineer - DC\/PT, Engineering , Austin, Texas
Didn't find what you're looking for? Search again!