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SoC Low Power DV Engineer

Company: Apple
Location: Austin
Posted on: November 19, 2023

Job Description:

Summary Posted: May 23, 2023 Role Number:200456973 Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new insights have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us. Key Qualifications - Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy - Knowledge of SystemVerilog, digital simulation and debug - Knowledge of computer architecture and digital design fundamentals - Exposure to low power verification and low power design principles is desired. - Experience with IEEE-1801 (UPF) or CPF based digital simulation flows is desired - Experience with Python, Perl, or similar scripting language - Ability to work independently to deliver the project goals - Experience with C is desired - Excellent interpersonal skills and the dream to take on diverse challenges Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You will be part of the team that is responsible for low power (LP) verification of various SOCs and guide IP teams with their low power verification flows. These flows are intricately tied to the core features on many Apple products and you will have exposure and access to many new and exciting products/features. It's part of the job to make sure we have the accurate power strategy, and you'll need to understand the functional & power goals of the design to accurately verify it. You will review power related aspects of design and architecture specifications of SOCs and work closely with design & micro-architecture teams to validate these design features. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. Education & Experience Minimum of BS + 3 years relevant industry experience. Additional Requirements

Keywords: Apple, Austin , SoC Low Power DV Engineer, Engineering , Austin, Texas

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