Sr Principal IC Physical Design Application Engineer
Company: Cadence Design Systems
Location: Austin
Posted on: January 25, 2023
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Job Description:
At Cadence, we hire and develop leaders and innovators who want
to make an impact on the world of technology.We are excited to
welcome highly talented hardware designers and application
engineers to join our Cadence North America Field Applications
Team. Working at Cadence means working alongside the industry's
brightest people and innovating for the most advanced companies in
the world. Through Cadence's Electronic Design Automation (EDA)
products, we've worked with a wide range of customers, from helping
build the world's most powerful supercomputer to innovating in the
field of artificial intelligence and machine learning.As an expert
Digital Implementation and Signoff Field Applications Engineering
(AE) , you will work side-by-side with our leading edge customers.
With your expertise, you'll help them deploy Cadence's
market-leading technologies in Synthesis, P&R, and Signoff to
meet/exceed their PPA targets, achieve faster design closure, and
turn their design concepts into reality. The greater your powers,
the more business opportunities you'll help bring to the table. You
will also work directly with the Cadence R&D group to drive the
customer requirements and influence the direction of Cadence
next-generation products and technologies.At Cadence, customers are
at the heart of everything we do. Talented engineers like you are
what enable us to materialize this passion into results. By working
directly with Cadence R&D and driving customer engagements, you
will enhance your in-depth knowledge in nanometer design, unlock
unique expertise in digital design implementation, and level up
your communication, customer, and sales skills. No matter where you
are in your career, whether your next career step is to stay on the
technical track, move up in management, or explore sales/marketing
career opportunities, the skills and expertise you gain as an
Application Engineer here at Cadence will put you miles ahead in
your career advancement.Key ResponsibilitiesProvide technical
support to Cadence customers in the areas of Backend Digital Design
Implementation and Signoff including Place and Route, Design
Closure, and timing/power signoffGuide customers on how to best
utilize Cadence technologies to achieve their design goals and meet
project schedulesConduct technical presentations and product
demonstrationsDrive technical evaluations/benchmarks to successWork
closely with R&D to enhance the tools and methodologies to meet
and exceed customer's requirementsDrive adoption and proliferation
of Cadence tools and technologies -Amend and augment the flow as
needed using Tcl and/or other programming skills to meet objectives
and improve results/flowsCapture best practices and lessons learned
from current evaluations/benchmarks and utilize to improve
efficiency and success rate in next engagements -Minimum12+ years
of design/EDA experience -BS degree Computer Science/Engineering,
Electrical, Engineering, or related field -Proven experience in
leading, managing, and driving major customer engagements to
successStrong knowledge in Digital Design Fundamentals,
Semiconductor fundamentals, and Static Timing Analysis is
requiredPrior experience with IC digital implementation flows and
backend EDA tools including Place and Route, IR Drop, backend
design timing and power closureExperience with advanced nodes 10nm
and belowExperience in scripting languages such as Tcl/Perl/Python
is a mustStrong customer-facing communication and problem-solving
skillsStrong personal drive for continuous learning and expanding
professional skill setsStrong verbal, written, and customer
communication skillsPreferredMS degree Computer
Science/Engineering, Electrical, Engineering, or related field
-Prior experience with IC digital implementation flows and font-end
EDA tools including Synthesis, DFT, and Logical Equivalence
CheckingPrior experience with Cadence tools such as Genus, Innovus,
Conformal, Tempus, Modus, and/or Voltus is highly desiredExperience
with advanced nodes 5nm and below#LI-MA1We're doing work that
matters. Help us solve what others can't.
Keywords: Cadence Design Systems, Austin , Sr Principal IC Physical Design Application Engineer, Engineering , Austin, Texas
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