Circuit Timing Engineer
Posted on: May 16, 2022
SummaryPosted: Oct 16, 2021Role Number:200264457Do you want to
utilize your engineering background to make big things happen? As
part of our Digital Design Engineering group, you'll take
imaginative and revolutionary ideas and determine how to turn them
into reality! Join us and you'll help crafting tools that allow us
to bring customers experiences they've never before envisioned! We
have an extraordinary opportunity for Circuit Timing Engineers. You
will be working on custom digital circuits and will implement
sophisticated circuit techniques to improve circuit performance,
optimize dynamic/static power and support full bring up through
productization. This highly visible role is at the heart of a
processor design effort, making a critical impact delivering
products to market quickly.Key Qualifications
- We are looking for applicants with 5+ years of proven
experience in transistor level static timing analysis and noise
- Expertise and in-depth knowledge of industry standard STA
tools, Nanotime and Primetime.
- Experience in timing constraints generation & management, and
timing convergence in the CPU environment.
- Familiarity with custom memory designs (SRAM/ register file /
- Familiarity with timing margining methods.
- Ability to perform spice simulations for correlation to static
timing and noise results.
- Expertise in analyzing and converging crosstalk delay and noise
glitch in deep submicron processes.
- Good interpersonal skills.
- Scripting skills for flow automation; experience with tcl is a
- Knowledge of industry standard circuit and design
tools.DescriptionImagine yourself at the center of our hardware
development effort. Where you will collaborate with all fields,
playing a strategic role of getting functional products to millions
of customers quickly. You will have the opportunity to integrate
and come-up with new insights, as well as work with a team of
hardworking engineers. As a Circuit Timing Engineer for the custom
digital team, you will develop timing models and will perform the
following: --- Enable global directives to ensure proper timing of
unrivaled circuit topologies. --- Provide a link between circuit
designers, tool developers and chip-level timing to validate
transistor-level timing accuracy and timing test correctness. ---
Help make the static timing experience better by scripting certain
aspects of the flow.Education & ExperienceBSEE / MSEE is
Keywords: Apple, Austin , Circuit Timing Engineer, Engineering , Austin, Texas
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