Principal Digital Design Engineer

Company: Skyworks Solutions, Inc.
Location: Austin
Posted on: November 19, 2021

Job Description:

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. Our work culture values diversity, social responsibility, open communication, mutual trust and respect. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID:--65609-- How the Timing Design Team Works Skyworks' Timing Division is focused on creating a new generation of clock, oscillator and network synchronization products. Our team designs system-on-chip hardware and software for precision timing chips. These complex mixed-signal ICs require a multi-disciplined IC design team working in close collaboration to achieve the lowest power and most cost-effective solutions. The Timing Design team is comprised of the brightest and most innovative engineers in the semiconductor industry, spanning multiple disciplines: Analog, RF, Digital and Software. Digital design engineers work closely with analog design engineers and software engineers throughout all phases of the chip design process: architecture, design and implementation, verification, and validation of silicon. Products are often mixed-signal and may include analog and RF components. Many of our products also include one or more CPUs, custom DSP hardware and Arithmetic/DSP cores. The Role You will develop innovative design solutions that will be integrated onto our mixed-signal ICs to provide critical features, enable power reduction, and improve performance for Timing applications. You will be responsible for the architecture and RTL design using synthesizable SystemVerilog HDL for integration on an IC with an embedded processor system. You will be performing digital design verification and full-chip mixed-signal verification. You will also be responsible for test vector development, lab test and evaluation of your designs. You will develop and document an efficient interface and programming model in conjunction with the software development team for your designs. Experience in CPU and SoC logic design and DSP hardware implementation is directly relevant. Challenges you will solve:

• Architect, design, and verify digital logic to meet critical power, performance, and area targets.
• Solutions will span across a wide range of areas, such as digital PLLs and mixed-signal sub-systems, analog-to-digital (A/D) and digital-to-analog (D/A) conversion, delta-sigma modulators and quantization noise reduction, custom DSP hardware, CPU (such as 8051 and/or ARM) integration and support, control state-machines, clock and power management infrastructure, NVM and SRAM controllers, memory generators and BIST
• Develop the digital logic needed for calibration, control, data processing, and enablement for the mixed-signal IP. Perform integration of mixed-signal IP, developing a Real Number Model (RNM) to support verification.
• Architect and implement cutting edge solutions incorporating low power methodologies, high-speed clocking strategies and multi-rate asynchronous clock domains.
• Contribute to the design team efficiency, productivity and quality through flow and methodology development.
• Contribute to all aspects of the design process from system conceptualization to mass production - Participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and full-chip mixed-signal verification, detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required for the achievement of high volume production Technologies we use: SystemVerilog, Real Number Modeling (RNM), Unified Power Format (UPF), System Verilog Assertions (SVA) based verification, mixed-mode verification, LINT, Conformal (CDC, LEC, CLP), Python, Tcl, C, Matlab Skills & Knowledge
  • Digital logic design and verification skills for CMOS integrated circuits, include low power techniques and multi-rate clocking strategies
  • CPU architecture and design knowledge (ARM, 8051, Arithmetic cores, DSP cores)
  • Embedded system-on-chip (SoC) architecture and design skills
  • Digital Signal Processing (DSP) hardware design and implementation
  • Verilog and SystemVerilog languages (RTL and behavioral)
  • Mixed-Signal design modeling and integration
  • Logic simulation and debug skills
  • Logic synthesis and timing analysis skills
  • Scripting languages such as Python, Perl, Tcl and Unix C shell Education and Experience M.S. or Ph.D. in Electrical and/or Computer Engineering with 8+ years of professional experience in design and verification of digital logic for CMOS integrated circuits. Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.
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Keywords: Skyworks Solutions, Inc., Austin , Principal Digital Design Engineer, Engineering , Austin, Texas