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Sr Staff Digital Verification Engineer

Company: Renesas Electronics
Location: Austin
Posted on: February 21, 2021

Job Description:

Renesas Electronics Americas (REA) brings together the strong financial foundation of a multi-billion dollar global operation and the flexibility and velocity of a smaller organization. A result of the combination of Renesas and Intersil, REA has a deep portfolio of technology, a strong customer base and big ambitions to grab more market share on a global stage. Our engineers, marketers, sales and support teams are all unified in our goal to create an environment where creativity thrives, where results are rewarded and where diversity is valued. REA is developing technologies for the latest advances in mobile computing, secured connected devices, autonomous driving, smart homes and factories and more. Our solutions are at the heart of products developed by the major innovators around the world.Renesas Electronics, the number one global supplier of microcontrollers and a leader in semiconductors, delivers trusted embedded design innovation that enables billions of connected, intelligent devices to enhance the way people work and live - securely and safely.REA is seeking a SoC Verification Engineer for our Infrastructure Power team in Austin, TX, where we develop the most advanced digital power IC's in the industry. We have high caliber talent covering all disciplines of IC development co-located in our Austin design center. You will work alongside the full spectrum of contributors to your products, including marketing, applications, logic design, analog design, firmware, verification, validation, software, product, and test engineers.You will architect, design, and maintain verification systems for integrated circuits that supply power to the largest and most powerful advanced computing platforms. Your contributions will span low level circuits to large system design and you will see those systems all the way through to high volume manufacturing.In this role, you will use your design and verification expertise to verify complex power management IC designs collaborating closely with design and verification engineers in active projects and perform hands-on verification. Using your SystemVerilog coding and problem-solving skills, you will build efficient and effective constrained-random verification environments that exercise designs through typical and corner-cases to uncover design errors. You will be responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.Responsibilities* Plan the verification of complex SoC & design blocks by fully understanding the design specification* Interact with design/system engineers to identify important verification scenarios* Create and enhance constrained-random verification environments using SystemVerilog* Create and support UVM compliant test-bench architecture* Formally verify designs with SVA and industry leading formal tools* Identify and write various coverage metrics for stimulus and corner-cases* Build reusable DV infrastructure components for both block and top-level environments* Debug tests in collaboration design engineering staff* Build verification tools for system automation, regressions and reportingMinimum Qualifications* BS/MSEE & 8-12 years of relevant work experience* Experience with Verilog, SystemVerilog, SVA and functional coverage* Deep understanding of event-driven simulator based modeling techniques* Advance knowledge of mixed signal concepts and digital-analog interfaces* Developed and executed several comprehensive SoC and block level verification plans* Worked on commercially successful IC's* Strong problem-solving abilities* Clear written and verbal communications, including code documentationPreferred Qualifications* 4-7 years of relevant experience in the design and/or verification of mixed signal and digital IC's* Experience in the verification of power management ICs, high speed interfaces, or peripheral controllers* Strong knowledge of SystemVerilog, VIP integration, High speed interface protocols* Experience in AMS modelling and verification* Prior experience in the development of the pre/post silicon verification strategy, test designs, and test infrastructure* Proficiency with a scripting language like Python/Perl* Familiarity with FPGA emulation techniques, lab equipment* Understanding of firmware (C language) based test routines to run on embedded MCUWe recognize and appreciate the value and contributions of individuals with diverse backgrounds and experiences and welcome all qualified individuals to apply.Equal Opportunity Employer: Disability/Veteran

Keywords: Renesas Electronics, Austin , Sr Staff Digital Verification Engineer, Engineering , Austin, Texas

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