CAD Engineer - Library Characterization / Static Timing Analysis

Company: Apple Inc.
Location: Austin
Posted on: January 26, 2023

Job Description:

CAD Engineer - Library Characterization / Static Timing Analysis Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance of every detail, of building the foundation as well as the larger structures upon it? As part of our Silicon Engineering Group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices! Together, you and your team will enable our customers to do all the things they love with their devices! In this critical role, you will be responsible for implementing and supporting the methodologies, flows, and tools necessary to deliver high-performance, low-power standard cell foundations used in synthesis, P&R, timing, signal integrity and power analysis for the most advanced silicon technology and design.

• strong analytical skills
• an understanding of silicon/CMOS
• Prior experience in SOC design, stdcell library design and characterization, synthesis, Place and Route, Static Timing Analysis, spice simulation and circuit design will all be helpful.
• Programming in Perl, Python, Tcl, or other languages is a must for efficient automation of tasks.
• Some experience with characterization or static timing analysis tools required: library characterization experience with spice, internal tools, or commercial tools such as Liberate, Variety, SiliconSmart, Liberty NCX, static timing analysis with Primetime or Tempus. In this exciting role on our team, you will:- Work closely with the stdcell library team and CAD team to characterize robust stdcell collateral for use in constructing and analyzing Apple silicon products- Implement, and maintain cell characterization tools and flows for the most advanced silicon modeling methodologies- Explore innovative modeling techniques in deep-submicron silicon for comprehending variation, layout-dependent effects, aging, simultaneous switching, etc.- Understand a variety of downstream CAD tools used for innovative design and standard methodologies in cell modeling to enable efficient and accurate design closure- Support static timing analysis and liberty model accuracy validation- Support advanced circuit design and modeling, pushing the boundary of what is possible in power, performance and area. Minimum requirements of Bachelors Degree + 3 years of industry experience

Keywords: Apple Inc., Austin , CAD Engineer - Library Characterization / Static Timing Analysis, Design, Graphic Design & CAD , Austin, Texas